Edaptive Training Solutions
Creating the Next Generation Microelectronics Verification Workforce
The Edaptive Computing Training Program comprises a suite of training courses that cover the theory of different verification methodologies and their application to relevant design use cases. Each course provides interactive sessions with instructors and students (on-site or online), an online platform to access the pertinent tools, and hands-on lab exercises to provide experience in applying verification methodologies to the student’s own designs.
ECI Formal Verification Training
This 3-day introduction to formal verification covers the theory and details behind formal methods and their application to hardware verification methodologies. It addresses inherent differences between formal verification and simulation-based approaches, requirements versus specifications, propositions, temporal assertions, sequential extended regular expressions, and finite state machines. It applies different formal languages to develop specifications for a broad variety of designs and use cases.
For more details, visit our Formal Training page.
OneSpin TrainingIntroductory OneSpin Series Training: This 4-day training series addresses the setup, methodology, and use of applications in the OneSpin tool suite to address a broad variety of problems in formal methods and model checking. The 4-day series is offered 3 times per year, online and on-site (conditions permitting).
- Day 1 introductes the One-Spin tool & environment, setup, and steps for design verification. Lessons cover autochecks and the applications available in the One-Spin tool: protocol checking, register mapping, and SoC connectivity.
- Day 2 discusses the details behind SystemVerilog Assertions (SVA) and assertion-based verification using the OneSpin formal analysis tool.
- Day 3 includes formal equivalence checking (EC) between designs using the One-Spin tool. We review setting up designs with the One-Spin tool and discuss the EC workflow, highlighting mapping, comparing and interpreting results, and analysis.
- Day 4 addresses fault injection and fault propagation applications leveraging the OneSpin formal analysis tool and interpreting the results.
Tortuga TrainingRadix-S Training: This one-day introductory Tortuga Logic Radix-S training class walks students through the use of the tool, debug methodologies, and ways to write effective Sentinel Security Rules to trace information flow through a design. Students will then be challenged to explore these foundational concepts in more detail through a combination of lectures and hands-on labs examining concepts such as Advanced Encryption Standard (AES) subsystem key leakage, protected memory access violations, firmware misconfiguration errors, and RISC-V system-level verification.
ECI Security Verification TrainingThis 3-day introductory training addresses the use of different verification methodologies to address security-based problems. The course highlights the security vulnerability landscape and discusses the different classes of security vulnerabilities. It covers the specification and verification of security properties using assertion-based and information-flow-based verification methods. Its interactive lab exercises highlight these security verification methodologies on a broad variety of design examples covering a wide range of security contexts.
RISC V Training
As a RISC-V International training partner, ECI provides a one-day course in formally verifying RISC-V (pipeline architecture of RISC-V ISA; architecture register modeling; and specifications to verify interrupts, exceptions and flushes) using OneSpin tools and verification of security properties (maintaining security in a design’s control and status registers, validating the functionality of physical memory protections, and identifying side-channel vulnerabilities) using Tortuga Logic tools, combined with emulation and simulation.
Edaptive Computing, Inc (ECI) is a RISC V International training partner.