RISC-V Verification Training – Edaptive Computing, Inc

RISC-V Verification Training

As a RISC-V International training partner, ECI provides a 1-day training covering (a) formal verification of RISC-V cores (pipeline, correct execution of standard and custom instructions, interrupts, exceptions, and flushes) using OneSpin’s Processor Integrity Solution; and (b) verification of security properties (maintaining security in a design’s control and status registers, validating the functionality of physical memory protections, and identifying side-channel vulnerabilities) using Tortuga Logic tools, combined with emulation and simulation